7th International Conference on VLSI & Embedded Systems (VLSIE 2026)

Memo

7th International Conference on VLSI & Embedded Systems (VLSIE 2026) August 15 ~ 16, 2026, Melbourne, Australia https://cst2026.org/vlsie/index Scope  The 7th International Conference on VLSI & Embedded Systems (VLSIE 2026) serves as a premier international forum for researchers, industry practitioners, and academic experts to share cutting edge advances in VLSI design, semiconductor technologies, embedded architectures, and intelligent systems. As the semiconductor landscape rapidly evolves with breakthroughs in chiplet based integration, AI driven design automation, advanced packaging, and next generation embedded intelligence, VLSIE 2026 aims to bring together diverse perspectives that drive innovation across theory, methodologies, tools, and real world applications. The conference invites original, unpublished research contributions that present significant advances in VLSI circuits, systems, CAD/EDA methodologies, embedded computing, hardware security, emerging nano devices, and domain specific architectures. Both theoretical developments and experimental results are welcome, along with survey papers, industrial case studies, and application driven research that highlight impactful progress in the field.Authors are encouraged to submit high quality articles that illustrate novel research results, innovative system designs, practical implementations, and forward looking insights across the broad spectrum of VLSI and embedded systems. Submissions may address, but are not limited to, the topics listed below. Topics of Interest VLSI Circuits, Design and Systems Digital, Analog, Mixed Signal and RF IC Design High Performance, Low Power and Ultra Low Power Circuits Clocking, Synchronization and Timing Optimization Memory Circuits: SRAM, DRAM, NVM, MRAM, ReRAM, PCM High Speed I/O, SerDes and On Chip Interconnects 3D ICs, 2.5D Integration and Advanced Packaging Chiplet Based SoCs and UCIe/BoW/AIB Interconnect Standards Gate All Around (GAA) Transistors and 2nm Process Technologies Co Packaged Optics (CPO), Silicon Photonics and Glass Substrates HBM4/HBM Next and High Bandwidth Flash (HBF) Memory   Computer Aided Design (CAD) and Electronic Design Automation (EDA) AI Driven EDA and ML Based Optimization (highlighted at VLSID 2026) Logic Synthesis, Physical Design and PandR Automation Formal Verification, Equivalence Checking and Model Checking Power, Thermal and Reliability Aware CAD CAD for 3D ICs, Chiplets and Heterogeneous Systems Security Aware CAD and Trojan Detection Simulation, Emulation and Virtual Prototyping Design Space Exploration and Automated Architecture Search Digital Twins for Semiconductor Design and Manufacturing Low Power, Energy Efficient and Sustainable VLSI Near Threshold and Sub Threshold Computing Energy Harvesting and Battery less Systems Thermal Management and Cooling Technologies Green Computing and Sustainable Semiconductor Design Emerging Technologies and Post CMOS Devices Spintronics, Photonics, MEMS/NEMS, 2D Materials Wafer Scale Computing Architectures Quantum Devices, Cryogenic CMOS and Quantum Classical Interfaces Neuromorphic Computing and Brain Inspired Hardware In Memory Computing (IMC) and Compute In Memory (CIM) Nano/Molecular Electronics Hardware Security, Trust and Supply Chain Integrity Side Channel and Fault Injection Attack Resilience Hardware Trojans: Detection and Prevention Secure Boot, Firmware Integrity and Trusted Execution Secure Semiconductor Supply Chain and Anti-Counterfeiting PUFs, Secure Key Storage and Cryptographic Hardware Microarchitecture and Processor Design RISC V Architectures, Vector Extensions and Domain Specific RISC V Application Specific Processors (ASIPs) GPU, TPU and AI Accelerator Architectures Memory Hierarchy, Caches and Interconnects High Performance and Low Power Microarchitectures   AI/ML Hardware and Accelerators AI Accelerators for DNNs, CNNs, Transformers and LLMs Hardware for LLM Training (not just inference) Edge AI SoCs and Ultra Low Power AI Hardware Processing in Memory (PIM) and Near Memory Computing FPGA Based AI Acceleration ML Driven Hardware Optimization Embedded Systems, IoT and Cyber Physical Systems Embedded System Architecture and HW/SW Co Design Real Time and Safety Critical Systems Real Time AI and Safety Certified ML Hardware (ISO 26262, DO 254) Embedded Software, Compilers and Toolchains Edge AI and TinyML Systems IoT Hardware Platforms, Sensors and Actuators Networked Embedded Systems and CPS Autonomous Systems, Robotics and Automotive Electronics Testing, Verification, Reliability and Fault Tolerance DFT, BIST and Post Silicon Validation Fault Modeling, Diagnosis and Recovery Reliability Under Variability, Aging and Soft Errors Test for 3D ICs, Chiplets and Heterogeneous Systems Safety Critical Verification (Automotive, Aerospace, Medical) Biomedical Circuits and Healthcare Electronics Wearable and Implantable Medical Devices Bio Signal Processing Hardware Neural Interfaces and Bio Integrated Electronics AI Driven Healthcare Hardware VLSI Applications and System Level Integration 5G/6G, THz Wireless and Communication Hardware Imaging, Video and Multimedia Processing Hardware Sensor Networks and Smart Devices Industrial, Automotive and Aerospace Electronics Security, Cryptography and Blockchain Hardware   Paper Submission Authors are invited to submit papers through the Submission System by May 10, 2026. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this conference. The proceedings of the conference will be published by Computer Science Conference Proceedings in Computer Science & Information Technology (CS&IT) series(Confirmed). Accepted papers will be given guidelines in preparing and submitting the final manuscript(s) together with the notification of acceptance. Signal & Image Processing : An International Journal(SIPIJ) International Journal of VLSI design & Communication Systems (VLSICS) International Journal of Embedded Systems and Applications (IJESA) Information Technology in Industry (ITII) Important Dates Second Batch : Submissions after April 06, 2026 Submission Deadline: May 10, 2026 Authors Notification: May 23, 2026 Registration & Camera-Ready Paper Due: June 25, 2026 Contact Us Here’s where you can reach us : This email address is being protected from spambots. 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